175 lines
6.5 KiB
Go
175 lines
6.5 KiB
Go
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// Copyright 2016 The Periph Authors. All rights reserved.
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// Use of this source code is governed under the Apache License, Version 2.0
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// that can be found in the LICENSE file.
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// This file contains pin mapping information that is specific to the Allwinner
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// A64 model.
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package allwinner
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import (
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"strings"
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"periph.io/x/periph/conn/pin"
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"periph.io/x/periph/host/sysfs"
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)
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// A64 specific pins.
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var (
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X32KFOUT *pin.BasicPin // Clock output of 32Khz crystal
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KEY_ADC *pin.BasicPin // 6 bits resolution ADC for key application; can work up to 250Hz conversion rate; reference voltage is 2.0V
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EAROUTP *pin.BasicPin // Earpiece amplifier negative differential output
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EAROUTN *pin.BasicPin // Earpiece amplifier positive differential output
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)
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//
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func init() {
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X32KFOUT = &pin.BasicPin{N: "X32KFOUT"}
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// BUG(maruel): These need to be converted to an analog.PinIO implementation
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// once analog support is implemented.
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KEY_ADC = &pin.BasicPin{N: "KEY_ADC"}
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EAROUTP = &pin.BasicPin{N: "EAROUTP"}
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EAROUTN = &pin.BasicPin{N: "EAROUTN"}
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}
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// mappingA64 describes the mapping of the A64 processor gpios to their
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// alternate functions.
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//
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// It omits the in & out functions which are available on all gpio.
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//
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// The mapping comes from the datasheet page 23:
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// http://files.pine64.org/doc/datasheet/pine64/A64_Datasheet_V1.1.pdf
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//
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// - The datasheet uses TWI instead of I2C but it is renamed here for
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// consistency.
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// - AIF is an audio interface, i.e. to connect to S/PDIF.
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// - RGMII means Reduced gigabit media-independent interface.
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// - SDC means SDCard?
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// - NAND connects to a NAND flash controller.
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// - CSI and CCI are for video capture.
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var mappingA64 = map[string][5]pin.Func{
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"PB0": {"UART2_TX", "", "JTAG0_TMS", "", "PB_EINT0"},
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"PB1": {"UART2_RX", "", "JTAG0_TCK", "SIM_PWREN", "PB_EINT1"},
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"PB2": {"UART2_RTS", "", "JTAG0_TDO", "SIM_VPPEN", "PB_EINT2"},
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"PB3": {"UART2_CTS", "I2S0_MCLK", "JTAG0_TDI", "SIM_VPPPP", "PB_EINT3"},
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"PB4": {"AIF2_SYNC", "I2S0_WS", "", "SIM_CLK", "PB_EINT4"},
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"PB5": {"AIF2_BCLK", "I2S0_SCK", "", "SIM_DATA", "PB_EINT5"},
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"PB6": {"AIF2_DOUT", "I2S0_DOUT", "", "SIM_RST", "PB_EINT6"},
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"PB7": {"AIF2_DIN", "I2S0_DIN", "", "SIM_DET", "PB_EINT7"},
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"PB8": {"", "", "UART0_TX", "", "PB_EINT8"},
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"PB9": {"", "", "UART0_RX", "", "PB_EINT9"},
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"PC0": {"NAND_WE", "", "SPI0_MOSI"},
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"PC1": {"NAND_ALE", "SDC2_DS", "SPI0_MISO"},
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"PC2": {"NAND_CLE", "", "SPI0_CLK"},
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"PC3": {"NAND_CE1", "", "SPI0_CS0"},
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"PC4": {"NAND_CE0"},
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"PC5": {"NAND_RE", "SDC2_CLK"},
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"PC6": {"NAND_RB0", "SDC2_CMD"},
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"PC7": {"NAND_RB1"},
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"PC8": {"NAND_DQ0", "SDC2_D0"},
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"PC9": {"NAND_DQ1", "SDC2_D1"},
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"PC10": {"NAND_DQ2", "SDC2_D2"},
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"PC11": {"NAND_DQ3", "SDC2_D3"},
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"PC12": {"NAND_DQ4", "SDC2_D4"},
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"PC13": {"NAND_DQ5", "SDC2_D5"},
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"PC14": {"NAND_DQ6", "SDC2_D6"},
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"PC15": {"NAND_DQ7", "SDC2_D7"},
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"PC16": {"NAND_DQS", "SDC2_RST"},
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"PD0": {"LCD_D2", "UART3_TX", "SPI1_CS0", "CCIR_CLK"},
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"PD1": {"LCD_D3", "UART3_RX", "SPI1_CLK", "CCIR_DE"},
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"PD2": {"LCD_D4", "UART4_TX", "SPI1_MOSI", "CCIR_HSYNC"},
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"PD3": {"LCD_D5", "UART4_RX", "SPI1_MISO", "CCIR_VSYNC"},
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"PD4": {"LCD_D6", "UART4_RTS", "", "CCIR_D0"},
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"PD5": {"LCD_D7", "UART4_CTS", "", "CCIR_D1"},
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"PD6": {"LCD_D10", "", "", "CCIR_D2"},
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"PD7": {"LCD_D11", "", "", "CCIR_D3"},
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"PD8": {"LCD_D12", "", "RGMII_RXD3", "CCIR_D4"},
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"PD9": {"LCD_D13", "", "RGMII_RXD2", "CCIR_D5"},
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"PD10": {"LCD_D14", "", "RGMII_RXD1"},
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"PD11": {"LCD_D15", "", "RGMII_RXD0"},
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"PD12": {"LCD_D18", "LVDS_VP0", "RGMII_RXCK"},
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"PD13": {"LCD_D19", "LVDS_VN0", "RGMII_RXCT"},
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"PD14": {"LCD_D20", "LVDS_VP1", "RGMII_RXER"},
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"PD15": {"LCD_D21", "LVDS_VN1", "RGMII_TXD3", "CCIR_D6"},
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"PD16": {"LCD_D22", "LVDS_VP2", "RGMII_TXD2", "CCIR_D7"},
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"PD17": {"LCD_D23", "LVDS_VN2", "RGMII_TXD1"},
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"PD18": {"LCD_CLK", "LVDS_VPC", "RGMII_TXD0"},
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"PD19": {"LCD_DE", "LVDS_VNC", "RGMII_TXCK"},
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"PD20": {"LCD_HSYNC", "LVDS_VP3", "RGMII_TXCT"},
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"PD21": {"LCD_VSYNC", "LVDS_VN3", "RGMII_CLKI"},
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"PD22": {"PWM0", "", "MDC"},
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"PD23": {"", "", "MDIO"},
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"PD24": {""},
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"PE0": {"CSI_PCLK", "", "TS_CLK"},
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"PE1": {"CSI_MCLK", "", "TS_ERR"},
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"PE2": {"CSI_HSYNC", "", "TS_SYNC"},
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"PE3": {"CSI_VSYNC", "", "TS_DVLD"},
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"PE4": {"CSI_D0", "", "TS_D0"},
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"PE5": {"CSI_D1", "", "TS_D1"},
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"PE6": {"CSI_D2", "", "TS_D2"},
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"PE7": {"CSI_D3", "", "TS_D3"},
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"PE8": {"CSI_D4", "", "TS_D4"},
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"PE9": {"CSI_D5", "", "TS_D5"},
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"PE10": {"CSI_D6", "", "TS_D6"},
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"PE11": {"CSI_D7", "", "TS_D7"},
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"PE12": {"CSI_SCK"},
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"PE13": {"CSI_SDA"},
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"PE14": {"PLL_LOCK_DBG", "I2C2_SCL"},
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"PE15": {"", "I2C2_SDA"},
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"PE16": {""},
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"PE17": {""},
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"PF0": {"SDC0_D1", "JTAG1_TMS"},
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"PF1": {"SDC0_D0", "JTAG1_TDI"},
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"PF2": {"SDC0_CLK", "UART0_TX"},
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"PF3": {"SDC0_CMD", "JTAG1_TDO"},
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"PF4": {"SDC0_D3", "UART0_RX"},
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"PF5": {"SDC0_D2", "JTAG1_TCK"},
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"PF6": {""},
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"PG0": {"SDC1_CLK", "", "", "", "PG_EINT0"},
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"PG1": {"SDC1_CMD", "", "", "", "PG_EINT1"},
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"PG2": {"SDC1_D0", "", "", "", "PG_EINT2"},
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"PG3": {"SDC1_D1", "", "", "", "PG_EINT3"},
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"PG4": {"SDC1_D2", "", "", "", "PG_EINT4"},
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"PG5": {"SDC1_D3", "", "", "", "PG_EINT5"},
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"PG6": {"UART1_TX", "", "", "", "PG_EINT6"},
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"PG7": {"UART1_RX", "", "", "", "PG_EINT7"},
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"PG8": {"UART1_RTS", "", "", "", "PG_EINT8"},
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"PG9": {"UART1_CTS", "", "", "", "PG_EINT9"},
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"PG10": {"AIF3_SYNC", "I2S1_WS", "", "", "PG_EINT10"},
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"PG11": {"AIF3_BCLK", "I2S1_SCK", "", "", "PG_EINT11"},
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"PG12": {"AIF3_DOUT", "I2S1_DOUT", "", "", "PG_EINT12"},
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"PG13": {"AIF3_DIN", "I2S1_DIN", "", "", "PG_EINT13"},
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"PH0": {"I2C0_SCL", "", "", "", "PH_EINT0"},
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"PH1": {"I2C0_SDA", "", "", "", "PH_EINT1"},
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"PH2": {"I2C1_SCL", "", "", "", "PH_EINT2"},
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"PH3": {"I2C1_SDA", "", "", "", "PH_EINT3"},
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"PH4": {"UART3_TX", "", "", "", "PH_EINT4"},
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"PH5": {"UART3_RX", "", "", "", "PH_EINT5"},
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"PH6": {"UART3_RTS", "", "", "", "PH_EINT6"},
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"PH7": {"UART3_CTS", "", "", "", "PH_EINT7"},
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"PH8": {"OWA_OUT", "", "", "", "PH_EINT8"},
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"PH9": {"", "", "", "", "PH_EINT9"},
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"PH10": {"MIC_CLK", "", "", "", "PH_EINT10"},
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"PH11": {"MIC_DATA", "", "", "", "PH_EINT11"},
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}
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// mapA64Pins uses mappingA64 to actually set the altFunc fields of all gpio
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// and mark them as available.
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//
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// It is called by the generic allwinner processor code if an A64 is detected.
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func mapA64Pins() error {
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for name, altFuncs := range mappingA64 {
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pin := cpupins[name]
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pin.altFunc = altFuncs
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pin.available = true
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if strings.Contains(string(altFuncs[4]), "_EINT") {
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pin.supportEdge = true
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}
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// Initializes the sysfs corresponding pin right away.
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pin.sysfsPin = sysfs.Pins[pin.Number()]
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}
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return nil
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}
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